Bias circuits are widely employed in analog or mixed signal electronic circuitry to set operating conditions by establishing a predetermined voltage at a given node. Typically, this operating condition is either established by a diode connected transistor with a current reference, or established by a diode connected transistor with a voltage reference. The latter type of circuit may act as a representative bias that configures a P-type metal-oxide-semiconductor (PMOS) transistor that is in diode connection indirectly with an amplifier in a negative feedback loop. The negative feedback loop introduces a reference voltage and helps to provide a larger output impedance for the bias circuit to improve performance while consuming less headroom than other approaches to bias circuit design. However, there may be situations in which it would be necessary or desired to dispense of either current or voltage input reference signals due to difficulties and constraints in providing such a reference signal.
Additionally, in some fields, a frequency proportioned output may be required for a bias circuit. For example, Phase Lock Loop (PLL) circuitry often find application in skew cancellation for phase aligning an internal clock to an input/output (I/O) clock. These sorts of PLLs have a wide range of application and are often employed with a wide bandwidth tuning range. Thus, it may be useful to employ a current bias proportional to a reference clock frequency along with different reference clocks to tune the bandwidth of the deskew PLL. However, conventional bias circuits, such as those described above, cannot output a frequency proportioned current.
There are, however, certain design approaches for implementing a frequency to current (F2I) convertor based on the conventional voltage reference bias circuit described above. For example, a switched capacitor resistor with an equivalent resistance that is inversely proportional to the frequency may be utilized for such a F2I converter. In this example, the equivalent resistance is equal to 1/(Fin*C), where Fin is the clock frequency and C is the capacitance of the switched capacitor resistor. Thus, in this example, the equivalent current flowing through the F2I circuit, which is proportional to the clock frequency, is given by VREF*Fin*C, where VREF is the reference voltage.
However, this implementation of the F2I circuit still has many limitations. For example, the F2I circuit described above requires the voltage source VREF as a reference. Further, the F2I circuit described above is limited in that it consumes only static current in an analog amplifier. Additionally, such a F2I circuit may find limited use in an analog/mixed signal (AMS) application, because of its lack of portability and robustness, which are important considerations for digital circuits.